Thursday, October 18, 2007

CFP: Software and Compilers for Embedded Systems (SCOPES 2008), March 13-14, Munich

11th International Workshop on
Software and Compilers for Embedded Systems


March 13-14, 2008
ICM, Munich, Germany




The influence of embedded systems is constantly growing. Increasingly powerful and versatile devices are developed and put on the market at a fast pace. The number of features is increasing, and so arre the constraints on the systems concerning size, performance, energy dissipation and timing predictability. Since most systems today use a processor to execute an application program rather than using dedicated hardware, the requirements can not be fulfilled by hardware architects alone: Hardware and software have to work together to meet the tight constraints put on modern devices.

One of the key characteristics of embedded software is that it heavily depends on the underlying hardware. The reason of the dependency is that embedded software needs to be designed in an application specific way. To reduce the system design cost, e.g. code size, energy consumption etc., embedded software needs to be optimized exploiting the characteristics of the underlying hardware.

SCOPES focuses on the software generation process for modern embedded systems. Topics of interest include all aspects of the compilation process, starting with suitable modeling and specification techniques and programming languages for embedded systems. The emphasis of the workshop lies on code generation techniques for embedded processors. The exploitation of specialized instruction set characteristics is as important as the development of new optimizations for embedded application domains. Cost criteria for the entire code generation and optimization process include runtime, timing predictability, energy dissipation, code size and others. Since today's embedded devices frequently consist of a multi-processor system-on-chip, the scope of this workshop is not limited to single- processor systems but particularly covers compilation techniques for MPSoC architectures.

In addition, this workshop intends to put a spotlight on the interactions between compilers and other components in the embedded system design process. This includes compiler support for e.g. architecture exploration during HW/SW codesign or interactions between operating systems and compilation techniques. Finally, techniques for compiler aided profiling, measurement, debugging and validation of embedded software are also covered by this workshop, because stability of embedded software is mandatory.

SCOPES 2008 is the 11th workshop in a series of workshops initially called "International Workshop on Code Generation for Embedded Processors". The name SCOPES has been used since the 4th workshop. The scope of the workshop remains software for embedded systems with emphasis on code generation (compilers) for embedded processors. SCOPES will be held in cooperation with ACM SIGBED and is sponsored by ARTIST2 and EDAA. SCOPES 2008 is co-located with the DATE conference.



Full paper submission: Dec 01, 2007
Notification of acceptance: Jan 30, 2008
Final paper submission: Feb 21, 2008



Papers should present original research results not published or submitted for publication in other forums. Papers should not exceed 10 pages (single- spaced, 2 columns, 10pt font; see the DATE website for detailed guidelines) and must be submitted using the SCOPES paper submission website. To permit blind review, submissions should not include the author names. Accepted papers will be published via the ACM digital library.



Heiko Falk
Computer Science 12
University of Dortmund, DE


Peter Marwedel
Computer Science 12
University of Dortmund, DE



Mailing List:



SCOPES 2008 is kindly supported and sponsored by the following companies and


+ Artist2 European NoE

+ European Design and Automation Association, EDAA

More information about the Artist Mailing List:

1 comment:

sandip said...

These two approaches to prototyping seem well separated in a SoC design’s project schedule. Since there’s no dependency on RTL, a VDK could be up and operational for software development in a matter of weeks versus the months typically required to create and obtain the RTL and IP required for synthesis and implementation into an FPGA. Bring up time is even shorter if you are able to leverage one of the pre-engineered VDKs offered by Synopsys. And if the VDK is serving as the software development platform then what more utility does the FPGA prototype provide beyond the RTL validation that a simulator or emulator can’t deliver as quickly?click here